Emerging 2.5G/3G wireless markets are introducing new data types and application performance requirements into the handheld-terminal market. But the market promises to be so dynamic that a new level ...
Enabling a robust on-chip debug capability is being recognized as animportant Design for Debug (DFD) capability for complex SoC and having DFDstandardization makes the Open Core Protocol (OCP) ...
Gilbert Laurenti, Texas Instruments Inc. Abstract Debug for SoC adds new requirements and challenges in terms of adding visibility and control to a system, simplifying integration of hardware and ...
NETLINK is a facility in the Linux operating system for user-space applications to communicate with the kernel. NETLINK is an extension of the standard socket implementation. Using NETLINK, an ...
Within the increasing complexity of SoC design, bus-interconnect is a key component which has led to evolution in the design of interconnect with a new socket-based approach. The socket is defined as: ...
Test is a dirty business. It can contaminate a unit or wafer, or the test hardware, which in turn can cause problems in the field. While this has not gone unnoticed, particularly as costs rise due to ...
Emerging 2.5G/3G wireless markets are introducing new data types and application performance requirements into the handheld-terminal market. But the market promises to be so dynamic that a new level ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results